For RF, microwave and millimeter-wave devices, the substrate is not simply a mechanical support. Its electrical isolation, crystal quality, thermal behavior and surface condition can directly influence device leakage, RF loss, breakdown behavior and epitaxial yield.

Semi-insulating GaN wafers are designed to suppress unwanted electrical conduction through the substrate. They are increasingly considered for GaN HEMTs, RF power amplifiers, radar modules, satellite communication systems and other high-frequency devices requiring strong isolation and controlled parasitic effects.

However, purchasing a wafer described only as “semi-insulating GaN” is risky. Buyers must also define resistivity, threading dislocation density, compensation method, surface orientation, wafer geometry and inspection requirements.

This guide explains the most important parameters and provides a practical RFQ checklist for sourcing semi-insulating GaN wafers.

What Is a Semi-Insulating GaN Wafer?

A semi-insulating GaN wafer is a gallium nitride substrate with very high electrical resistivity compared with conductive N-type GaN.

GaN naturally tends to show residual N-type conductivity because of impurities and native defects. To obtain semi-insulating behavior, these free carriers must be compensated by deep-level acceptors or other controlled defect mechanisms.

Common compensation approaches include:

• Iron-doped GaN, commonly written as Fe
• Carbon-compensated GaN
• Manganese-doped GaN in specialized or research applications
• Carefully controlled unintentionally doped or high-resistivity GaN

These approaches are not electrically identical. Dopant concentration and distribution can influence resistivity, carrier trapping, temperature stability and dynamic device behavior. Research comparing Fe-, C- and Mn-doped HVPE GaN substrates found different acceptor levels and conduction characteristics, confirming that buyers should not treat every semi-insulating wafer as equivalent.

Why RF Devices Require a Semi-Insulating Substrate

1. Improved Device Isolation

RF integrated devices may contain multiple transistors, passive components and transmission structures on the same wafer. A conductive substrate can create unintended electrical paths between components.

A semi-insulating substrate helps isolate neighboring devices and reduces substrate-related leakage.

2. Reduced RF Substrate Loss

At high frequencies, conductive paths inside the substrate may absorb RF energy and reduce device efficiency. High bulk resistivity helps suppress these parasitic currents.

However, resistivity is not the only factor controlling RF loss. The epitaxial buffer, interface quality, trap distribution, dielectric properties and device layout must also be considered.

3. Better OFF-State Control

An electrically insulating platform supports more stable device pinch-off and helps reduce unwanted current flowing through the buffer or substrate during OFF-state operation.

This is especially important for AlGaN/GaN HEMTs operating at high voltage or high RF power density.

4. GaN-on-GaN Homoepitaxy

A free-standing GaN substrate allows GaN epitaxial layers to be grown on a native GaN crystal instead of a foreign substrate such as sapphire, silicon or SiC.

GaN-on-GaN growth can reduce lattice-mismatch-related stress and provide a lower-defect platform. The final advantage still depends on substrate quality, epitaxial design and processing conditions.

Resistivity: The First Electrical Parameter to Confirm

Resistivity indicates how strongly the wafer resists electrical current. It is normally expressed in ohm-centimeters:

Ω·cm

A current 2-inch free-standing semi-insulating GaN option may specify resistivity above 10⁶ Ω·cm at 300 K. This should be treated as a product-specific example rather than a universal RF industry standard. Different RF designs may require different minimum values. 

When requesting resistivity data, buyers should confirm:

• Minimum resistivity value
• Measurement temperature
• Measurement method
• Number and location of measurement points
• Center-to-edge uniformity
• Lot-to-lot variation
• Behavior at elevated temperature
• Compensation dopant or mechanism

Why a Single Resistivity Number Is Not Enough

A supplier may report only the highest or central resistivity value. This does not show whether the complete usable area satisfies the required electrical specification.

For RF production, a full-wafer resistivity map or multi-point measurement report is more useful than a single center-point result.

Buyers should also avoid assuming that the highest possible resistivity automatically produces the best device. Excessive or poorly controlled deep-level doping can introduce carrier trapping and affect dynamic device performance.

What Is TDD in a GaN Wafer?

TDD stands for threading dislocation density. It describes the number of threading dislocations passing through a defined area of the GaN crystal and is commonly reported in:

cm⁻²

Threading dislocations may be classified as:

• Edge dislocations
• Screw dislocations
• Mixed dislocations

A lower TDD generally provides a better platform for epitaxial growth and can support improved wafer uniformity, reduced leakage and higher device reliability. Nevertheless, TDD must be evaluated together with surface defects, macrodefects, doping uniformity and the quality of the subsequent epitaxial structure.

Free-standing GaN wafers commonly offer lower TDD than GaN layers grown directly on highly mismatched foreign substrates. Published research on free-standing semi-insulating GaN also reports TDD values around the 10⁶ cm⁻² level, although the actual result depends on growth technology and wafer grade.

How Should TDD Be Measured?

Different inspection methods may produce different results. The RFQ should therefore state both the TDD limit and the required measurement method.

Common methods include:

• Cathodoluminescence imaging
• Etch-pit density measurement
• Transmission electron microscopy for localized analysis
• X-ray diffraction rocking-curve measurements
• Optical or automated defect mapping

XRD FWHM can provide useful information about crystal quality, but it should not automatically be treated as a direct replacement for TDD measurement.

Ask the supplier to identify:

• Measurement method
• Inspected area
• Edge exclusion
• Sampling pattern
• Average and maximum values
• Whether the result is wafer-level or lot-level

Resistivity and TDD Must Be Evaluated Together

A wafer can have high resistivity but unacceptable dislocation density. It can also have low TDD but insufficient electrical isolation.

For RF applications, the following combination is generally more meaningful than any single specification:

Free-Standing GaN, GaN Template or GaN Epitaxial Wafer?

These products are often confused during purchasing.

Free-Standing Semi-Insulating GaN Substrate

The complete mechanical wafer is made primarily of GaN. It is normally produced using technologies such as HVPE and then separated from the original growth platform.

It is suitable when the buyer wants a native GaN substrate for customized homoepitaxial growth.

Semi-Insulating GaN Template

A GaN template normally consists of a GaN layer grown on sapphire, silicon or another carrier substrate.

Templates can be more economical, but their TDD, thermal properties, stress and electrical behavior differ from those of free-standing GaN.

GaN RF Epitaxial Wafer

An epitaxial wafer includes the device-layer structure, such as nucleation layers, buffer layers, GaN channels, AlN interlayers, AlGaN barriers and cap layers.

When ordering an RF epitaxial wafer, the complete layer structure must be specified in addition to the substrate.

Key Specifications for an RF GaN Wafer RFQ

Example RFQ for a 2-Inch Semi-Insulating GaN Wafer

The following example can be sent to a supplier and adjusted according to the device process:

Product: Free-standing semi-insulating GaN substrate
Application: AlGaN/GaN RF HEMT epitaxial growth
Diameter: 50.8 mm
Orientation: C-plane (0001)
Surface Polarity: Ga-face
Thickness: 330 ± 25 µm
Conductivity: Semi-insulating
Resistivity: Greater than 10⁶ Ω·cm at 300 K
TDD: Less than 5 × 10⁶ cm⁻²
TTV: Maximum 15 µm
Bow: Maximum 20 µm
Front Surface: Epi-ready polished
Surface Roughness: Ra below 0.2 nm
Back Surface: Fine ground or polished
Usable Area: Greater than 90%
Inspection: Resistivity, TDD, TTV, bow, AFM and optical defect report
Quantity: 5 pieces for qualification, followed by pilot production
Packaging: Individual cleanroom wafer container under nitrogen

The values above are an example procurement configuration. Final acceptance limits should be confirmed according to the epitaxial reactor, RF device structure and available wafer grade.

Common Purchasing Mistakes

Ordering “Semi-Insulating GaN” Without Defining the Product Form

A template, free-standing substrate and finished epi wafer are different products. Always state which one is required.

Specifying Resistivity Without Temperature

Electrical properties can change with temperature. The RFQ should define the measurement temperature, normally starting with 300 K.

Accepting TDD Without a Measurement Method

Two suppliers may use different inspection methods and report results that are not directly comparable.

Ignoring Dopant and Compensation Type

Fe-doped, carbon-compensated and other semi-insulating GaN materials can show different trapping and temperature-dependent behavior.

Focusing Only on Crystal Quality

A low-TDD wafer may still cause processing problems if its TTV, bow, surface roughness or edge quality is unsuitable for the customer’s equipment.

Skipping Sample Qualification

RF buyers should normally test a small qualification batch before approving a production order. Wafer acceptance should be based on both incoming inspection and actual epitaxial or device results.

Frequently Asked Questions

What resistivity is required for an RF GaN substrate?

There is no single value suitable for every RF device. A specification above 10⁶ Ω·cm at 300 K may be used as a starting point for certain free-standing GaN products, but the final requirement should be determined by the device structure, frequency, voltage and isolation target.

Is a lower TDD always better?

Lower TDD is generally desirable, but it is not the only quality indicator. Surface defects, resistivity uniformity, macrodefects, wafer geometry and the epitaxial process also influence final device performance.

What is the difference between Fe-doped and undoped semi-insulating GaN?

Fe-doped GaN uses iron-related deep acceptor levels to compensate residual carriers. Material described as undoped or UID may use other compensation mechanisms. Buyers should request the actual compensation method and electrical characterization instead of relying only on the product name.

Can semi-insulating GaN be used for power devices?

Yes. It may be used for lateral power and RF devices that require substrate isolation. Conductive N-type GaN is generally more appropriate for vertical device structures where current must pass through the substrate.

Are 4-inch semi-insulating GaN wafers available?

Both 2-inch and 4-inch products are available from selected suppliers, but 4-inch availability, grade, lead time and usable-area specifications should be confirmed before device design is finalized.

Should the front surface be SSP or DSP?

An epi-ready single-side-polished surface is sufficient for many epitaxial processes. Double-side polishing may be required for bonding, backside alignment, optical inspection or specialized device processing.

Conclusion

Semi-insulating GaN wafers can provide a valuable native substrate platform for RF HEMTs, microwave devices and high-frequency research. Successful purchasing requires more than requesting a high-resistivity GaN wafer.

Buyers should define the product form, resistivity, compensation method, TDD, surface orientation, wafer geometry, polishing condition and inspection method in the RFQ.

For quotation and technical evaluation, provide:

• Application and intended frequency
• Free-standing substrate, template or epi-wafer requirement
• Diameter and thickness
• Orientation and off-cut
• Minimum resistivity
• Maximum TDD
• Surface and geometry requirements
• Inspection reports
• Qualification and production quantities

A complete specification allows the supplier to recommend a realistic wafer grade and reduces the risk of receiving material that meets a basic datasheet but does not perform correctly in the RF process.